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1 : //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file contains the AArch64 implementation of the MRegisterInfo class.
11 : //
12 : //===----------------------------------------------------------------------===//
13 :
14 : #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
15 : #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
16 :
17 : #define GET_REGINFO_HEADER
18 : #include "AArch64GenRegisterInfo.inc"
19 :
20 : namespace llvm {
21 :
22 : class MachineFunction;
23 : class RegScavenger;
24 : class TargetRegisterClass;
25 : class Triple;
26 :
27 : class AArch64RegisterInfo final : public AArch64GenRegisterInfo {
28 : const Triple &TT;
29 :
30 : public:
31 : AArch64RegisterInfo(const Triple &TT);
32 :
33 : bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
34 : bool isAnyArgRegReserved(const MachineFunction &MF) const;
35 : void emitReservedArgRegCallError(const MachineFunction &MF) const;
36 :
37 : void UpdateCustomCalleeSavedRegs(MachineFunction &MF) const;
38 : void UpdateCustomCallPreservedMask(MachineFunction &MF,
39 : const uint32_t **Mask) const;
40 :
41 : /// Code Generation virtual methods...
42 : const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
43 : const MCPhysReg *
44 : getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
45 : const uint32_t *getCallPreservedMask(const MachineFunction &MF,
46 : CallingConv::ID) const override;
47 :
48 14095 : unsigned getCSRFirstUseCost() const override {
49 : // The cost will be compared against BlockFrequency where entry has the
50 : // value of 1 << 14. A value of 5 will choose to spill or split really
51 : // cold path instead of using a callee-saved register.
52 14095 : return 5;
53 : }
54 :
55 : const TargetRegisterClass *
56 : getSubClassWithSubReg(const TargetRegisterClass *RC,
57 : unsigned Idx) const override;
58 :
59 : // Calls involved in thread-local variable lookup save more registers than
60 : // normal calls, so they need a different mask to represent this.
61 : const uint32_t *getTLSCallPreservedMask() const;
62 :
63 : /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
64 : /// case that 'returned' is on an i64 first argument if the calling convention
65 : /// is one that can (partially) model this attribute with a preserved mask
66 : /// (i.e. it is a calling convention that uses the same register for the first
67 : /// i64 argument and an i64 return value)
68 : ///
69 : /// Should return NULL in the case that the calling convention does not have
70 : /// this property
71 : const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
72 : CallingConv::ID) const;
73 :
74 : /// Stack probing calls preserve different CSRs to the normal CC.
75 : const uint32_t *getWindowsStackProbePreservedMask() const;
76 :
77 : BitVector getReservedRegs(const MachineFunction &MF) const override;
78 : bool isAsmClobberable(const MachineFunction &MF,
79 : unsigned PhysReg) const override;
80 : bool isConstantPhysReg(unsigned PhysReg) const override;
81 : const TargetRegisterClass *
82 : getPointerRegClass(const MachineFunction &MF,
83 : unsigned Kind = 0) const override;
84 : const TargetRegisterClass *
85 : getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
86 :
87 : bool requiresRegisterScavenging(const MachineFunction &MF) const override;
88 : bool useFPForScavengingIndex(const MachineFunction &MF) const override;
89 : bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
90 :
91 : bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
92 : bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg,
93 : int64_t Offset) const override;
94 : void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
95 : int FrameIdx,
96 : int64_t Offset) const override;
97 : void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
98 : int64_t Offset) const override;
99 : void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
100 : unsigned FIOperandNum,
101 : RegScavenger *RS = nullptr) const override;
102 : bool cannotEliminateFrame(const MachineFunction &MF) const;
103 :
104 : bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
105 : bool hasBasePointer(const MachineFunction &MF) const;
106 : unsigned getBaseRegister() const;
107 :
108 : // Debug information queries.
109 : unsigned getFrameRegister(const MachineFunction &MF) const override;
110 :
111 : unsigned getRegPressureLimit(const TargetRegisterClass *RC,
112 : MachineFunction &MF) const override;
113 :
114 29017 : bool trackLivenessAfterRegAlloc(const MachineFunction&) const override {
115 29017 : return true;
116 : }
117 : };
118 :
119 : } // end namespace llvm
120 :
121 : #endif
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